The inter-integrated (I²C) protocol allows communication between devices, with some designated as master devices and others as slave devices. As with SPI, it is designed for communication over short distances. However, unlike SPI, it is asynchronous. This means that only two wires are needed to exchange data. A further advantage is that it supports a multi-master system, which allows more than one master to communicate with all of the devices on the bus. Two disadvantages are that there is more hardware overhead and the communication speeds are lower.

There are two signals used on an I²C, SCL and SDA. SCL is a clock signal and SDA is a data signal. The bus master generates the clock signal. However, a slave can slow down the clock to delay the master sending more data – this is called clock stretching.

I²C bus drivers are open drain, which means that they can pull a signal line low but not high! This means that there cannot be a situation where one device tries to bring a line high, while another tries to bring the line low. This eliminates any chance of damage from excessive power being disspitated. There is a pull-up resistor on each line to restore the signal to high when no device is making it low.

I²C allows for the connection of two devices with different voltages. However, if the difference is too large then you will need to add level-shifting circuitry. When you use level-shifting circuitry means that you will have a circuit on the I²C bus at one voltage and a circuit on the I²C bus at another voltage. You can then add further circuits that operate at these voltages to the I²C bus. There are a number of ways of level-shifting. You can use MOSFETs, ICs, transistors, diodes and transistors.